Project Status and Plan
Current progress and future plans for the USB-PD powered modular synthesizer power supply.
๐ฏ Project Goalโ
Low-noise power module supplying ยฑ12V/+5V for modular synths from USB-C PD 15V input
- Protection circuit safe for modular synth beginners
- All parts available from JLCPCB (stable supply, low cost)
- Low-noise design with <1mVp-p ripple
- Easy to use with USB-C PD
โ Completed Itemsโ
1. Circuit Design (100% Complete)โ
4-Stage Architecture Completed:
USB-C 15V โโโฌโโ +13.5V (DC-DC) โโโ +12V (LDO) โโโ +12V OUT
โ
โโโ +7.5V (DC-DC) โโโ +5V (LDO) โโโ +5V OUT
โ
โโโ -15V (Inverter) โโโ -13.5V (DC-DC) โโโ -12V (LDO) โโโ -12V OUT
- โ Stage 1: USB-PD Power Supply (STUSB4500)
- โ Stage 2: DC-DC Converters (LM2596S ร 3 + LM2586 inverted SEPIC)
- โ Stage 3: Linear Regulators (LM7812/7805/7912)
- โ Stage 4: Protection Circuit (PTC + Fuse + TVS)
2. Parts Selection (100% Complete) โ โ
All parts confirmed: All JLCPCB part numbers finalized
- โ USB-PD Controller: STUSB4500 (C2678061)
- โ DC-DC Converter: LM2596S-ADJ ร 3 (C347423)
- โ Voltage Inverter: LM2586SX-ADJ/NOPB (C181324)
- โ Linear Regulators: L7812CV-DG (C2914) / L7805ABD2T-TR (C86206) / CJ7912 (C94173)
- โ Inductors: 100ยตH 4.5A ร 3 (C19268674)
- โ TVS Diodes: SMAJ15A, SD05
- โ Fuses: 1.5A ร 2 confirmed (C95352)
Unconfirmed Parts โ All Confirmed! โ
- โ
PTC Resettable Fuses ร 3
- PTC1: 1.1A 16V (1812) โ C883148 (BSMD1812-110-16V)
- PTC2: 0.75A 16V (1206) โ C883128 (BSMD1206-075-16V)
- PTC3: 0.9Aโ1.1A 16V (1812) โ C883148 (BSMD1812-110-16V) โป
- โ 2A SMD Fuse ร 1 (for +12V) โ C5183824 (6125FA2A)
โป 0.9A part out of stock. 1.1A provides sufficient protection margin for -12V actual load of 800mA.
3. Documentation (100% Complete)โ
- โ Complete circuit diagrams (all 10 stages)
- โ Detailed BOM (with JLCPCB part numbers)
- โ Design philosophy and architecture explanation
- โ Protection circuit operation description
4. Cost Estimation (100% Complete) โ โ
Total with all parts confirmed: $4.68/board
- Stage 1: $0.43
- Stage 2: $2.09
- Stage 3: $0.37
- Stage 4: $1.79 (all parts confirmed price)
5. PCB Layout (100% Complete) โ โ
PCBA v2 layout complete โ DRC clean as of 2026-04-18:
- โ R14 (470 ฮฉ) placed โ VBUS_IN to VBUS_VS_DISCH (pin 18) pull
- โ R15, R16 (4.7 k each) placed โ I2C pull-ups for NVM programming interface
- โ J2 placed โ pogo pad footprint for NVM programming access
- โ All components placed and routed
- โ DRC run with zero errors
๐ Current Statusโ
Where Are We Now?โ
PCBA v2 schematic and PCB layout complete โ ready to generate manufacturing files
Full project history to date:
- โ Circuit design complete โ Working 4-stage design finalized
- โ All parts selection complete โ JLCPCB part numbers confirmed (100%), optimized to high-stock parts
- โ BOM fully confirmed โ Cost $4.68/board
- โ PCBA v1 ordered and tested โ Board powered up but STUSB4500 failed to negotiate USB-PD. Root cause: pin 18 (VBUS_VS_DISCH) unconnected, pin 22 (VSYS) shorted to VREG_2V7. Bodge wires applied for analysis.
- โ v2 schematic fixes applied โ R14 (470 ฮฉ, pin 18 pull), R15/R16 (4.7 k I2C pull-ups), J2 (pogo pads for NVM programming) added. VSYS connected to GND.
- โ v2 PCB layout complete โ All components placed and routed. DRC clean as of 2026-04-18.
- โณ Generate manufacturing files โ Gerbers, drill files, BOM, CPL for JLCPCB reorder โ This is next!
Hardware Acquiredโ
- NUCLEO-F072RB (STM32 Nucleo board, used as USB-to-I2C bridge for STUSB4500 NVM programming) โ purchased
- 4P 2.54 mm pogo pin clip (AliExpress item 1005006108783889, mates with J2 pogo pads) โ purchased
- PCBA v1 physical boards โ N boards retained for bodge reference (see JLCPCB order history)
What's Next?โ
Generate Gerber/BOM/CPL files and place PCBA v2 order at JLCPCB
- โ Schematic and PCB layout done โ v2 schematic and layout with all debug fixes applied
- โ DRC clean โ Zero errors as of 2026-04-18
- ๐ Next Action: Generate manufacturing files from KiCad
- Gerber files โ Drill files โ BOM (JLCPCB format) โ CPL (component placement)
๐ Next Steps (Priority Order)โ
๐ด Priority: High - Do Immediatelyโ
Step 1: Search for Unconfirmed Parts โ
Complete!โ
Parts found:
- โ PTC Resettable Fuses ร 3 types
- PTC1 (1.1A 16V, 1812): C883148 - Stock: 11,029
- PTC2 (0.75A 16V, 1206): C883128 - Stock: 51,532
- PTC3 (1.1A 16V, 1812): C883148 - Stock: 11,029 โป0.9A part unavailable
- โ SMD Fuse (2A 250V)
- C5183824 (6125FA2A, 2410 package) - Stock: 744
Step 2: Finalize BOM โ
Complete!โ
- โ
Part numbers added to
/notes/parts.md - โ Final cost calculated: $4.68/board
- โ
Reflected in
/doc/do../components/bom.md - โ All parts optimized to high-stock items (CH224D, L7812/7805, CJ7912)
๐ก Priority: Medium - Do Nextโ
Step 3: Prepare PCB Design โ
Complete!โ
KiCad Project Setup:
- Create new KiCad project
- Enter circuit in schematic editor
- Add JLCPCB footprint library
- Assign footprints to all parts
Required footprints:
/footprints/CH224D.png- Already available/footprints/USB-TYPE-C-009.png- Already available- Other standard footprints use KiCad standard library
Step 4: PCB Board Design โ
Complete!โ
Layout Policy:
- 4-Layer Board Structure:
- Layer 1 (Top): Signals + component placement
- Layer 2 (Inner): GND plane
- Layer 3 (Inner): Power plane (+15V, +12V, etc.)
- Layer 4 (Bottom): Signals
- Power Layout:
- Place USB-PD โ DC-DC โ LDO in sequence
- Physically separate high-noise (DC-DC) and low-noise (LDO) sections
- Make high-current paths thick and short
- Thermal Design:
- LM2596S (TO-263) โ Place thermal vias
- LM78xx/79xx (TO-220) โ Reserve heatsink area
- Consider electrolytic capacitor heat dissipation
- JLCPCB Design Rules:
- Minimum trace width: 6mil (0.15mm)
- Minimum clearance: 6mil
- Via diameter: 0.3mm (hole 0.2mm)
๐ข Priority: Low - Pre-Prototype Preparationโ
Step 5: Generate Manufacturing Files (Time: 1 hour) โ We are here!โ
- Generate Gerber files
- Generate Drill files
- Generate BOM file (JLCPCB format)
- Generate CPL file (component placement data)
Step 6: Get JLCPCB Quote (Time: 30 minutes)โ
Quote contents:
- PCB manufacturing: 5 or 10 boards
- SMT assembly: both sides or single side
- Parts procurement cost
- Shipping
Estimated Cost (for 10 boards):
- PCB manufacturing: ~$30
- SMT assembly: ~$50-100
- Parts cost: ~$50 (for 10 boards)
- Shipping: ~$20
- Total: $150-200 (10 boards = $15-20 per board)
Step 7: Order Prototype (Time: 15 min order + 2 weeks manufacturing)โ
Recommended Initial Order:
- Quantity: 5-10 boards
- SMT assembly: All parts installed
- Delivery: DHL (2-3 weeks)
PCBA v1 Failure Findingsโ
The first prototype PCBA (v1) failed during testing. The STUSB4500 USB-PD controller did not negotiate power delivery. Root cause analysis identified three issues:
Issues Foundโ
-
Pin 18 (VBUS_VS_DISCH) not connected - This pin was left as NC but must be connected to VBUS_IN via a 470ohm series resistor for VBUS voltage sensing. This is a critical connection required by the datasheet.
-
Pin 22 (VSYS) floating - After cutting the incorrect VSYS-to-VREG_2V7 trace, VSYS was left floating. The datasheet requires VSYS to be connected to GND when not used.
-
Pin 22 (VSYS) shorted to Pin 23 (VREG_2V7) - A routing error in the original schematic connected these pins together, overloading the internal 2.7V regulator. Fixed by cutting the trace on the PCBA.
Required Schematic Fixes Before Next Orderโ
- Add R14 (470ohm) from VBUS_IN to VBUS_VS_DISCH (pin 18)
- Connect VSYS (pin 22) to GND
- Verify VREG_2V7 (pin 23) decoupling is correct (C30 only)
- Run DRC and review all STUSB4500 connections
See the full PCBA v1 Debug Report for detailed analysis, bodge wire instructions, and reference design comparison.
๐ค Design Concerns and Considerationsโ
Issues Resolved in Current Designโ
- โ Noise countermeasure: DC-DC + LDO 2-stage design expected to achieve <1mVp-p
- โ Beginner-friendly: PTC auto-reset for automatic recovery from overload
- โ Cost: Parts cost under $5 using many Basic Parts
- โ Procurement stability: All parts have abundant JLCPCB stock
Items Not Yet Verified (Confirm with Prototype)โ
- โ ๏ธ Thermal design: Is LM2596S heat dissipation sufficient?
- Maximum loss: Each 1.5V ร 1A = 1.5W
- TO-263 package should handle it but needs actual measurement
- โ ๏ธ Ripple noise: Can actual measurement achieve <1mVp-p?
- Design should be fine but needs measurement
- โ ๏ธ Efficiency: Can actual measurement achieve 75-80%?
- LM2596S: 85-90%
- LDO loss: 10-15%
- Calculated overall efficiency: 75-80%
- โ ๏ธ EMI/EMC: DC-DC switching noise impact?
- Countermeasures with input/output filters but needs measurement
๐ Design Philosophy Reviewโ
Why This Design?โ
- DC-DC + LDO 2-Stage Method
- Reason: Balance efficiency and noise
- DC-DC only: Efficient but high ripple
- LDO only: Low noise but poor efficiency (high heat)
- 2-stage: Best of both worlds โจ
- USB-C PD 15V Input
- Reason: Can use generic chargers
- No AC adapter needed โ Easy to carry
- Any PD-compatible charger works
- 15V voltage optimal for generating ยฑ12V
- All Parts from JLCPCB
- Reason: Stable supply, low cost, automated assembly
- Many Basic Parts โ No extra fees
- Abundant stock โ Long-term procurement possible
- SMT automated assembly โ No hand soldering needed
- PTC Auto-Reset Protection
- Reason: Safe for beginners
- Module overload โ Notice when LED goes out
- Auto-reset after 30 seconds โ No repair needed
- Fuse for short circuits โ Safety ensured
๐ฏ Project Goalsโ
Final Goalโ
"Manufacture beginner-friendly modular synth power supply with JLCPCB for under $20/board"
Achievement Criteriaโ
- Ripple noise <1mVp-p (measured)
- Efficiency 75-80% (measured)
- Output voltage accuracy ยฑ1% (measured)
- Overload protection operation confirmed (LED off โ auto-reset)
- Short circuit protection operation confirmed (fuse blown)
- Manufacturing cost under $20/board (when ordering 10 boards)
Secondary Goalsโ
- ๐ Comprehensive English documentation โ Contribute to international Maker community
- ๐ง Open-source KiCad project
- ๐ Write build article (Blog/Medium)
- ๐ Share JLCPCB SMT utilization know-how
๐ก What You Can Do Nowโ
After reading this document, you can immediately start:
5 minutes: Search for partsโ Complete!30 minutes: Update BOMโ Complete!1 hour: Install KiCad and create new projectโ Complete!1 day: Enter complete circuit in schematic editorโ Complete!- 1 hour: Generate Gerber/BOM/CPL files in KiCad and place PCBA v2 order โ Start here!
PCBA v2 schematic + layout done and DRC clean! Generate manufacturing files and reorder! ๐